1. Technical Field
The disclosed embodiments relate to multi-modulus dividers (MMDs), and in particular to reducing power consumption in a modulus divider stage (MDS) of an MMD.
2. Background Information
The receiver and transmitter circuitry within a cellular telephone typically includes one or more local oscillators. The function of a local oscillator is to output a signal of a selected frequency. Such a local oscillator in a cellular telephone may, for example, include a phase-locked loop (PLL) that receives a stable but relatively low frequency signal (for example, 20 MHz) from a crystal oscillator and generates the output signal of the selected relatively high frequency (for example, 900 MHz). The feedback loop of the PLL includes a frequency divider that receives the high frequency signal and divides it down to obtain a low frequency signal that is of the same phase and frequency as the signal from the crystal oscillator. A type of divider referred to here a “multi-modulus divider” is often used to realize the frequency divider. Due to the high frequency operation of the frequency divider, the circuitry of the frequency divider may consume an undesirably large amount of power. Techniques and methods for reducing the amount of power consumed by the frequency dividers in the local oscillators are desired.